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Controllers: Chip Level: PCL6113

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Tech Spec
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Technical Specification

    English/Imperial
Acceleration rate setting range 2 to 16,383 (14 bit)  
CPU interface 8 or 16-bit bus  
Deceleration rate setting range 2 to 16,383 (14 bit)  
Max. Output frequency   9.8M pps
No. of axes 1  
No. of positioning pulse setting range -134,217,728 to + 134,217,727 (28 bit)  
No. of speed setting registers 2 (FL, FH)  
No. of steps to set/change the speed 1 to 16,383 (14 bit)  
Package type 80-pin QFP  
Power supply voltage +3.3V ±10%  
Ramping down point setting range 0 to 16,777,215 (24 bit)  
RoHS Compliant Yes  
S-curve Yes (provided for each axes)  
Speed multiplication rate range 0.1 to 600x  
Standard Reference Clock 19.6608 (30 max.) MHz  

Manuals & Documents




System Drawing